RISC-V Fast-Forwards, Breaks Ground for Auto Innovations
By Anders Holmberg, IAR Systems.
EETimes (July 17, 2023)
The SiFive RISC-V Automotive CPU IP continues to advance to address and enable automotive applications like infotainment, connectivity and advanced driver-assistance systems. Yet without the right tools, embedded software developers at OEMS and suppliers cannot make full use of the energy efficiency, simplicity, security and flexibility that RISC-V offers.
Formal standards for safety certification have been around for many years, but over the last few years, the interest in and use of such standards has risen quite dramatically. Within automotive systems, the sector-specific standard ISO 26262 is used. Getting your application functional safety (FuSa)-certified is just a fact of life in the automotive industry. However, this process is not full-fledged in the RISC-V toolchain ecosystem, with many players coming from the broad market missing the embedded expertise in safety applications.
To read the full article, click here
Related Semiconductor IP
- RISC-V IOPMP IP
- RISC-V Debug & Trace IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- 64-bit RISC-V core with in-order single issue pipeline. Tiny Linux-capable processor for IoT applications.
- Tiny, Ultra-Low-Power Embedded RISC-V Processor
Related Articles
- RISC-V in 2025: Progress, Challenges,and What’s Next for Automotive & OpenHardware
- Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions
- Enabling Space-Grade AI/ML with RISC-V: A Fully European Stack for Autonomous Missions
- RISC-V Functional Safety for Autonomous Automotive Systems: An Analytical Framework and Research Roadmap for ML-Assisted Certification
Latest Articles
- SCENIC: Stream Computation-Enhanced SmartNIC
- Agentic AI-based Coverage Closure for Formal Verification
- Microarchitectural Co-Optimization for Sustained Throughput of RISC-V Multi-Lane Chaining Vector Processors
- RISC-V Functional Safety for Autonomous Automotive Systems: An Analytical Framework and Research Roadmap for ML-Assisted Certification
- Emulation-based System-on-Chip Security Verification: Challenges and Opportunities