Multi-Layer Deep Data Performance Monitoring and Optimization
By proteanTecs, Siemens Digital Industries Software
Combining functional and parametric monitoring of the real-world behavior of complex SoCs provides a powerful new approach that facilitates performance optimization during development and in the field, improves security and safety, and enables predictive maintenance to prevent field failures. proteanTecs’ Universal Chip Telemetry (UCT) and Siemens’ Tessent Embedded Analytics are complementary technologies that enable just such an approach, informed by Deep Data.
Examples based on ADAS and autonomous driving systems demonstrate how the two systems interact to shine a light on even the most complex problems in electronics design, production and deployment.
To read the full article, click here
Related Semiconductor IP
- DSP-Based 112G SerDes
- XTAL oscillator in TSMC-7nm
- GPU
- V-by-One Verification IP
- AI model compression IP
Related Articles
- Performance Optimization of Embedded Software for ARM Processors and AMBA Methodology-based Systems
- A Multi-Objective Optimization Model for Energy and Performance Aware Synthesis of NoC Architecture
- Performance Measurements of Synchronization Mechanisms on 16PE NOC Based Multi-Core with Dedicated Synchronization and Data NOC
- System Performance Analysis and Software Optimization Using a TLM Virtual Platform
Latest Articles
- SEAM-V: A Hybrid-Decoupled RISC-V Vector Processor with Backend-Visible EP Context for Sustained Vector Throughput
- New Number Formats for FFT IP Cores in Optical OFDM Transceivers
- Reducing Power Consumption of Embedded Dynamic Memories with ECCs
- NIFA: Nonlinear IMC enhanced FPGA for efficient ML inference
- A 32-channel event-based bio-signal analog front-end with adaptive delta and pulse frequency encoding