How to reduce board management costs, failures, and design time
Shyam Chandra, Lattice Semiconductor
EETimes (10/12/2010 8:40 AM EDT)
In order to meet the demands of increased functionality, performance, and reduced power, many modern circuit boards use highly integrated CPUs, ASSPs, ASICs, and memory devices to implement the circuit board’s main function (the payload function).
Boards of this complexity are particularly common in equipment designed for communications infrastructures, computer servers, and higher end industrial and medical systems. Because the ICs on the board are usually fabricated with fine transistor geometries, they require multiple power supply rails with tight tolerances to operate. Typically, seven to ten supplies are needed in a complex circuit board, with higher numbers not unusual.
The management of these supplies – along with other system management tasks – is increasing in complexity and cost. This is leading many board designers to ask: "How can I reduce the cost and complexity associated with implementing board management?"
To read the full article, click here
Related Semiconductor IP
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
- AMBA Bus Host to eSPI Controller
Related Articles
- How to design secure SoCs, Part II: Key Management
- Tools For Reprogrammability -> Programmable ASICs to reduce costs
- How to Integrate Flash Device Programming and Reduce Costs
- How to reduce costs by integrating PCI interface functions into CPLDs
Latest Articles
- ZK-Flex: A Flexible and Scalable Framework for Accelerating Zero-Knowledge Proofs
- ITP-STDP: An Intrinsic-Timing Power-of-Two Learning Engine for On-Chip SNN Training
- OpenEye: A Scalable Open-Source Hardware Accelerator for DNNs
- CHIMERA: A Flexible and Scalable 3.1 TOPS/W AI-MCU with Transformer Accelerator and 563 Gb/s Shared-L2 Memory Subsystem with QoS Guarantees
- CXL-ClusterSim: Modeling CXL-based Disaggregated Memory Cluster for Pooling and Sharing using gem5 and SST