Hardware/Software integration: Closing the gap
Tom Huang, Pete Mar, InPA Systems inc.
3/13/2011 6:08 PM EDT
Introduction
In recent years, system integration associated with System on Chip (SoC) design has grown at a rapid rate and continues to drive the semiconductor design market. Although this growth has been beneficial for the design community, the sophisticated and complex manufacturing requirements of next generation devices have increased the cost of ASIC and ASSP development. Product implementation of complex, low-power designs requires early integration of various hardware features with corresponding firmware onto one silicon device. The reduced lifespan of current products have condensed SoC development cycles and have made the SoC verification and in-system validation process an arduous task. The bulk of time spent during the product development cycle of SoCs is often in hardware/software integration and has brought in-system validation to the forefront of this extensive process.
To read the full article, click here
Related Semiconductor IP
- Peripheral Sensor Interface (PSI5) Host Controller
- Link Acceleration Unit
- 64-bit, RISC-V, ultra-high performance processors
- 64-bit, RISC-V, performance and data computation processors
- 32-bit, RISC-V, deeply embedded processors
Related Articles
- Designers confront costs of SoC scaling, integration
- Systems and Integration : What's next in Compact PCI?
- SoC integration complexities rise
- Opto-electronics -> Monolithic integration requires clever process, packaging schemes
Latest Articles
- Design and Development of a Neuromorphic Silicon Suite: PVT Sensing, Stochastic LIF Inference, On-Chip STDP Learning, and Crossbar Programming
- LLM4RTL: Tool-Assisted LLM for RTL Generation
- Towards Delta Aware Training: Efficient DNN Weight Storage for Resource-Constrained FPGAs
- CHERI-D: Secure and efficient inline object ID for CHERI temporal memory safety
- AIA: A 16nm Multicore SoC for Approximate Inference Acceleration Exploiting Non-normalized Knuth-Yao Sampling and Inter-Core Register Sharing