Emulator, accelerator, prototype - what’s the difference?
Brian Bailey
EETimes (11/1/2010 4:45 PM EDT)
In a previous blog, I talked about the confusion that seems to exist about the similarities and differences between emulators, accelerators and prototypes. In that blog I talked about what makes a prototype unique, and said I would come back to the issue of emulators and accelerators, so here we are.
First off, most of the time, as a user, you don’t really care. The differences are in the internals of how they are implemented, and this may affect the features they make available, but for the most part the confusion is created by the manufacturers of these devices so that they can say they are #1, or unique, or have highest capacity or speed or whatever. Let’s cut through all of that and look at what is fundamentally different. There is an umbrella term for all of them which is hardware assisted verification.
To read the full article, click here
Related Semiconductor IP
- NPU IP
- JPEG XL Encoder
- I2C Master/Slave Controller Core
- NVMe Validation Test Suite
- Hybrid Memory Cube Verification IP
Related Articles
- Increasing visibility in FPGA prototypes and emulators
- A silicon virtual prototype is key in achieving design closure
- SoCs need logical virtual prototype
- Build Complex ASICs Without ASIC Design Expertise, Expensive Tools - Take advantage of an architecture comparable to your original FPGA prototype design by migrating to a structured ASIC
Latest Articles
- Terracotta: Enabling the Adoption of New DRAM Techniques via a Flexible DRAM Interface and Memory Controller
- A Framework for Accelerating Transformer Inference on RISC-V for Edge AI
- An Interleaved Parallel Dependent Quantization Hardware Architecture for H.266/VVC
- A Formal Security Analysis of CAN XL
- A Secure dToF LiDAR SoC with Dual-Domain Fingerprinting and Event-Driven AFE Circuit Achieving Sensor-Level Attack Resilience