EDA 3.0: So you are an EDA startup?
By Tom Kozas, President, Energo Design Solutions and Michael Sanie, Managing Director at Maestro International
edadesignline.com (March 17, 2009)
A lot has been written and said in the last few months about the state of the EDA (Electronic Design Automation) industry and how to grow it. Less has been said about EDA startups, their challenges, and growth opportunities.
There is a reason for EDA startups to exist and be supported, namely they have demonstrated a strong advantage in their ability to rapidly implement, deliver, and evolve new technology. Historically new innovation has predominantly come from the startups in this space, but often the new innovation has not turned into successful products and hence profitable businesses. The days of throwing money at startups and hoping they succeed are long past. Startups, their founders, executives, and investors need to take a more strategic approach, ideally before any code is written, but certainly before any significant investment occurs.
edadesignline.com (March 17, 2009)
A lot has been written and said in the last few months about the state of the EDA (Electronic Design Automation) industry and how to grow it. Less has been said about EDA startups, their challenges, and growth opportunities.
There is a reason for EDA startups to exist and be supported, namely they have demonstrated a strong advantage in their ability to rapidly implement, deliver, and evolve new technology. Historically new innovation has predominantly come from the startups in this space, but often the new innovation has not turned into successful products and hence profitable businesses. The days of throwing money at startups and hoping they succeed are long past. Startups, their founders, executives, and investors need to take a more strategic approach, ideally before any code is written, but certainly before any significant investment occurs.
To read the full article, click here
Related Semiconductor IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
- UCIe 2.x Controller IP
- SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP
- OpenTitan-based RISC-V Secure Element
Related Articles
- Map drives EDA vendors
- EDA leaders trade places
- Chip IP revenues fall, but overall EDA remains healthy in Q1, says group
- Pricing, expansion keys to growth in EDA
Latest Articles
- Automated Pre-Silicon Verification of High-Speed DDR5 and LPDDR5/6 Memory Controllers: Closed-Loop Timing, Mode Register, and PHY Synchronization in UVM
- U-Sonic: An Open-Source 8-Channel Ultrasound Transmit IP in a 130 nm RISC-V SoC
- S-ALSA: Co-Design of Adiabatic Logic-based Sensing and Balanced Bit-Cells for Secure and Energy-Efficient MRAM
- MEGATRON: a 28nm Analog PCM CiM/Digital System-on-Chip for Edge GenAI at 57.5 TOPS/W and 1.52 Mparam/mm²
- Peregrino: A Full-Hardware Accelerator for the Complete Falcon Post-Quantum Digital Signature Scheme on Resource-Constrained Edge Devices