Use formal, online communication to deliver design quality closure
Stephane Bonniol, Satin IP Technologies
EE Times (11/16/2009 12:01 AM EST)
If an integrated circuit design is to meet the need for high-quality/low-risk implementation, the need for formal communication among the participants in the design process is obviously necessary. When design engineers, design managers and mask shop engineers are at multiple sites--each team and each site working within their own schedule constraints--moving communication online is a must.
Online communication lets system-on-chip integrators do their jobs in parallel to intellectual property design and software development, and in complete awareness of the design-for-mask-manufacturing (DFFM) constraints imposed by the next engineering steps.
To read the full article, click here
Related Semiconductor IP
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
Related Articles
- Analog design quality closure: What’s missing from current flows?
- Agile Analog's Approach to Analog IP Design and Quality --- Why "Silicon Proven" is NOT What You Think
- IP users value quality, support
- SoCs: Supporting Socketization -> Methodology key to quality
Latest Articles
- SCENIC: Stream Computation-Enhanced SmartNIC
- Agentic AI-based Coverage Closure for Formal Verification
- Microarchitectural Co-Optimization for Sustained Throughput of RISC-V Multi-Lane Chaining Vector Processors
- RISC-V Functional Safety for Autonomous Automotive Systems: An Analytical Framework and Research Roadmap for ML-Assisted Certification
- Emulation-based System-on-Chip Security Verification: Challenges and Opportunities