Design planning for large SoC implementation at 40nm: Guaranteeing predictable schedule and first-pass silicon success

Bhupesh Dasila, Open-Silicon
EDN (May 7, 2013)

The physical design implementation of large complex deep sub-micron technologies has evolved to a stage where it is essential to consider every aspect of SoC design and implementation during the planning process. The era of a waterfall flow from RTL to GDSII was over long ago. Even the efforts to bridge the gap between the front-end and back-end design process, through tools and flows, are not always sufficient.

Modern SoC development requires a holistic approach and thorough planning starting at the design architecture of the SoC. The ASIC implementation process has to keep pace with the design complexity, performance, and time-to-market, all while ensuring first-time silicon success. These challenges, which are compounded by the advancement in the package technology and the complex foundry requirements at 40nm and lower nodes, make it essential to evaluate the design requirements and the technology limitations early on in the SoC design cycle.

Every team involved in SoC development must work cohesively for optimal planning and strategy. Large, complex designs with high performance requirements benefit from comprehensive planning up-front. These benefits include both predictability and reliability of results.

The most important aspect of planning and strategy is dividing the execution into different phases. These phases include technology, design flow, and SoC evaluation, exploring and identifying physical design challenges early, and finally physical design implementation. The physical design implementation team should thoroughly identify and define the entry and exit criteria at every phase. The learning from one phase should become the foundation for the next phase of the execution.

The definition of various phases and the criteria for entry and exit should align with the RTL design and verification process and their milestones. Hence communication between various groups involved in SoC development is crucial. The key is to thoroughly analyze and explore the design before the final implementation is executed on the fully-verified design to achieve predictable results in quality and schedule.

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