Careful IP Integration Key to First-Pass Silicon
Vamshi Krishna, Sr. FAE & IP Solutions Manager, Open-Silicon
EETimes (4/25/2016 00:00 AM EDT)
Follow these four aspects of IP integration to allow first-pass ASIC silicon when using IP from multiple vendors.
Most ASIC companies today rely on third-party IP in building a custom ASIC/SoC. While ensuring convenience in terms of flexibility, schedule, and cost effectiveness, however, this approach can also present challenges. IP companies, although they adhere to common Industry standards, typically follow different IP development processes, apply different quality benchmarks, and provide different deliverables. The fact that each IP block is unique with respect to its function creates even more differentiation. All this variability makes it difficult to assemble an ASIC using IP from multiple sources and achieve first-pass silicon.
It is possible to achieve first-pass silicon, however, by following a careful integration process. Here are four aspects that ASIC design companies have to consider when using IP blocks from different vendors.
To read the full article, click here
Related Semiconductor IP
Related Articles
- Mastering Key Technologies to Realize the Dream - M31 IP Integration Services
- The common silicon issues in analog IP integration
- Agile Analog's Approach to Analog IP Design and Quality --- Why "Silicon Proven" is NOT What You Think
- SoCs: Design tools -> Configurability is key to IP integration
Latest Articles
- BitFair: A 12nm Bit-Serial CNN Accelerator with Learnable Early Termination and Adaptive Bit Ordering for Ultra-Low-Power XR Vision
- A Flexible Sparsity-Aware FPGA Accelerator with Column-Wise Compression for Efficient CNN Inference
- Reducing Instruction-Fetch Energy in RISC-V for Embedded AI Processing via Dynamic and Static Loop Caching
- SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow
- A Heterogeneous Neural Network Accelerator for End-to-End Multitask RF Signal Recognition