Analyzing Collusion Threats in the Semiconductor Supply Chain
By Sanjay (Jay) Rekhi 1, Kostas Amberiadis 1, Abir Ahsan Akib 2, Ankur Srivastava 2
1 Computer Security Information Technology Laboratory
2 Electrical and Computer Engineering University of Maryland, College Park
Abstract
This work proposes a framework for analyzing threats related to the semiconductor supply chain. The framework introduces a metric that quantifies the severity of different threats subjected to a collusion of adversaries from different stages of the supply chain. Two different case studies are provided to describe the real-life application of the framework. The metrics and analysis aim to guide security efforts and optimize the trade-offs of hardware security and costs.
To read the full article, click here
Related Semiconductor IP
- Chiplet Die-to-Die Interconnect IP Solution
- High speed MACsec Engine 100G/200G/400G/800G/1.6T
- Temperature/Voltage sensors
- AMBA Bus Host to eSPI Controller/Target
- AMBA Bus Host to eSPI Controller
Related Articles
- Securing the IC Supply Chain - Integrating PUF-Based hardware security
- A Time for Rebalancing Global Patent Strategies in the Semiconductor Market?
- Reverse Disaggregation - How Silicon IP Will Change the Semiconductor Supply Chain
- 6 steps for optimizing the IC supply chain
Latest Articles
- ZK-Flex: A Flexible and Scalable Framework for Accelerating Zero-Knowledge Proofs
- ITP-STDP: An Intrinsic-Timing Power-of-Two Learning Engine for On-Chip SNN Training
- OpenEye: A Scalable Open-Source Hardware Accelerator for DNNs
- CHIMERA: A Flexible and Scalable 3.1 TOPS/W AI-MCU with Transformer Accelerator and 563 Gb/s Shared-L2 Memory Subsystem with QoS Guarantees
- CXL-ClusterSim: Modeling CXL-based Disaggregated Memory Cluster for Pooling and Sharing using gem5 and SST