Harness speed, performance, signal integrity, and low current advantages of 65nm QDR family SRAMs
Jayasree Nayar, Cypress Semiconductor
EETimes (8/23/2010 12:36 PM EDT)
There is increased demand for SRAMs with faster speed, better performance, lower currents, and better signal integrity for next-generation networking applications. To keep up with this demand, the 65nm technology QDR families of devices have been introduced which offer significant advantages over 90nm technology-based QDR devices. This article describes in detail the advantages of the 65nm technology QDR family devices over their 90nm technology equivalent (See Table 1) and provides guidelines for simplifying the migration from 90nm to 65nm technology.
To read the full article, click here
Related Semiconductor IP
- Peripheral Sensor Interface (PSI5) Host Controller
- Link Acceleration Unit
- 64-bit, RISC-V, ultra-high performance processors
- 64-bit, RISC-V, performance and data computation processors
- 32-bit, RISC-V, deeply embedded processors
Related Articles
- Soft errors affect SRAM's future
- Developing and Integrating FPGA Co-processors with the TiC6X Family of DSP Processors
- Low-power SRAMs improve system picture
- How To Interface DDR-II SRAMs with Stratix II Devices
Latest Articles
- Design and Development of a Neuromorphic Silicon Suite: PVT Sensing, Stochastic LIF Inference, On-Chip STDP Learning, and Crossbar Programming
- LLM4RTL: Tool-Assisted LLM for RTL Generation
- Towards Delta Aware Training: Efficient DNN Weight Storage for Resource-Constrained FPGAs
- CHERI-D: Secure and efficient inline object ID for CHERI temporal memory safety
- AIA: A 16nm Multicore SoC for Approximate Inference Acceleration Exploiting Non-normalized Knuth-Yao Sampling and Inter-Core Register Sharing