Silicon Library Inc. develops SD UHS-II PHY MACRO
August 20, 2010 -- Silicon Library Inc. develops SD UHS-II PHY Macro. SLI ZRSLSIPSDUHS2PHY is PHY IP solution for UHS-II interface that SD Association is working on the standardization as the new ultra high speed interface for both SDHC and SDXC.
By using SLI's unique SerDes technology, ZRSLSIPSDUHS2PHY achieves 300MB/s that is the maximum speed for UHS-II with the low power consumption.
This PHY IP can be applied to both the device and host sides including SDIO and hence it can be utilized for SOCs for various applications including SD cards, digital cameras, digital videos, digital TVs, media players and personal computers.
Related Semiconductor IP
- SerDes
- 32Gbps SerDes PHY in GF 22nm
- Ultra-Low Latency 32Gbps SerDes IP in TSMC 12nm FFC
- Ultra-Low Latency 32Gbps SerDes IP in TSMC 22nm ULP
- 32Gbps SerDes IP in TSMC 12nm FFC
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