Samsung Ramps 10nm in 2016
FinFET Roadmap Aligns with TSMC's Plans
5/22/2015 01:50 AM EDT
SAN FRANCISCO -- Samsung announced its next-generation process technology, a 10nm FinFET node, at a company event here. The announcement comes a month after Samsung detailed its 14nm process.
Samsung was shy on specs, but said the process node will be in full production by the end of 2016, about the same time as its rival TSMC. The Samsung 10nm process offers “significant power, area, and performance advantages” and targets a broad range of markets, said foundry senior vice president Hong Hao.
To read the full article, click here
Related Semiconductor IP
- Verification IP for C-PHY
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
Related News
- Intel: 450-mm wafers must wait on 10-nm
- Quad patterning a possibility at 10nm, says TSMC
- UMC joins IBM chip alliance for 10nm process development
- Common Platform in Preparation for SOI, FinFETs at 10nm
Latest News
- JEDEC Advances DDR5 MRDIMM Ecosystem with New Memory Interface Logic and Expanded MRDIMM Roadmap
- Altera Brings Determinism to Physical AI Systems with Latest Release of FPGA AI Suite
- Mosaic SoC raises $3.8M to bring real-time spatial intelligence to every consumer device
- UMC Reports First Quarter 2026 Results
- Rambus Appoints Sumeet Gagneja as Chief Financial Officer