Samsung Ramps 10nm in 2016
FinFET Roadmap Aligns with TSMC's Plans
Jessica Lipsky, EETimes
5/22/2015 01:50 AM EDT
SAN FRANCISCO -- Samsung announced its next-generation process technology, a 10nm FinFET node, at a company event here. The announcement comes a month after Samsung detailed its 14nm process.
Samsung was shy on specs, but said the process node will be in full production by the end of 2016, about the same time as its rival TSMC. The Samsung 10nm process offers “significant power, area, and performance advantages” and targets a broad range of markets, said foundry senior vice president Hong Hao.
To read the full article, click here
Related Semiconductor IP
- CXL Controller With HPC Features (Spec Version 3.0 and Above)
- AP Memory VHM Controller
- High-performance, commercial-grade RISC-V CPU Core IP
- SWI3S Verification IP
- Secure Boot Loader
Related News
- Intel: 450-mm wafers must wait on 10-nm
- Quad patterning a possibility at 10nm, says TSMC
- UMC joins IBM chip alliance for 10nm process development
- Common Platform in Preparation for SOI, FinFETs at 10nm
Latest News
- Brite Semiconductor Releases 28nm High-Performance SAR ADC IP, Driving Upgrades for High-Speed Signal Chain Applications
- Synopsys Updates CXL IP Portfolio for AI-Era Infrastructure
- BrainChip Launches Symphony Community Akida Bundle For IBM’s Workload Management Solution
- StarIC Appoints Dr. Masum Hossain as Chief Technology Officer
- Andes Technology Empowers RISC-V Developers with Its New Streamlined IDE, RVBuilder