DOLPHIN Integration complete their offering with high added value trainings
Grenoble, France, March 18, 2011 - Facing the pressure of delivery schedules to provide right-on-first-pass Silicon IPs and Custom Systems-on-Chip (SoC) themselves, Dolphin Integration have developed techniques based on behavioral modeling to speed-up simulation and on detectors to reduce verification time and increase hierarchical verification coverage.
Now that these methodologies have proven their added-value, Dolphin is spreading these techniques externally and making them accessible to designers through training programs as follows:
- HDL-AMS Modeling trainings not only teach the language constructs of either Verilog-AMS or VHDL-AMS, but also techniques to create and validate behavioral models. By attending one of these trainings, designers will learn how to perform bottom-up modeling through structural assembly of behavioral models for multi-level simulations.
- Analog Detectors training is based on the "EMBLEM Detectors library" and teaches how to use an existing detector, how to assemble custom detectors and how to implement a network of detectors for automating on-line verification of analog designs. Detectors from EMBLEM Detectors can be used in simulation to reveal expected events, undesirable events or bugs in analog or mixed circuits, with respect to specifications which would otherwise be checked only at latest stages.
All trainings are built on practical exercises which will be performed with SLED, the hierarchical schematic editor, and SMASH, the multi-level simulator.
Training sessions are organized regularly around Europe, America and Asia. The next session is scheduled beginning of April in Germany for the "VHDL-AMS modeling training". Registrations are almost over, fill in this form to be able to attend this session.
For more information on the training programs and on the calendar of the next sessions, please contact Nathalie Dufayard at solutions@dolphin-integration.com.
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own EDA solutions enabling Integration Hardware Modeling (IHM) and Application Hardware Modeling (AHM) as well as early Power and Noise assessment, plus engineering assistance for Risk Control. For more information about Dolphin, visit: www.dolphin.fr/eda
Related Semiconductor IP
- Verification IP for C-PHY
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
Related News
- Do not miss the Green Thursday offering for ultra Low-Power SoCs at 55 nm
- Save up to 20 % of silicon area with Dolphin Integration's standard cell library SESAME uHD
- Dolphin Integration unveils a Smart Modulator for lowest power-consumption of digital microphones
- Amazing improvement of power and density for RFID chips with standard cell libraries at 180 nm from Dolphin Integration
Latest News
- JEDEC Advances DDR5 MRDIMM Ecosystem with New Memory Interface Logic and Expanded MRDIMM Roadmap
- Altera Brings Determinism to Physical AI Systems with Latest Release of FPGA AI Suite
- Mosaic SoC raises $3.8M to bring real-time spatial intelligence to every consumer device
- UMC Reports First Quarter 2026 Results
- Rambus Appoints Sumeet Gagneja as Chief Financial Officer