Do not miss the Green Thursday offering for ultra Low-Power SoCs at 55 nm
Grenoble, France - June 23, 2016 -- Leading-edge More-Than-Moore process variants at 55 nm for the challenges of IoT and wearable devices deserve equally state-of-the-art low power design methodologies: it involves Silicon IPs for embedding the Power Regulation Network and for the SoC Mode Control Network, together with the transfer of know-how to ensure a safe and smooth design-in.
Designers of low-power SoCs targeting 55 nm are proposed two self-contained kits, of Silicon IPs, with design methodologies, at a very attractive price up until the Green Thursday, June 30. Each kit is tailored to a major SoC challenge:
- For SoCs mostly in sleep mode: Power Regulation & Control Network kit
- For high duty-cycle SoCs: Voltage Regulation Network kit
REQUEST A “GREEN THURSDAY” QUOTE VALID UNTIL JUNE 30,2016
Such kits may be complemented with Foundation, Fabric and Feature IPs – such as standard cell libraries, memory generators, WhisperTrigger voice activity detector, uLP oscillators… – to combine the best power consumption, whatever the mode of activity of the SoC, with the smallest silicon area.
A catalog providing an overview of this consistent offering of Silicon IPs in 55 nm is immediately available on request.
About Dolphin Integration
DOLPHIN Integration contributes to "enabling low-power Systems-on-Chip" for worldwide customers - up to the major actors of the semiconductor industry - with high-density Silicon IP components best at low-power consumption.
"Foundation IPs" includes innovative libraries of standard cells, register files and memory generators as well as an ultra-low power cache controller. "Fabric IPs" of voltage regulators, Power Island Construction Kit and their control network MAESTRO enable to safely implement low-power SoCs with the smallest silicon area. They also star the "Feature IP": from ultra-low power Voice Activity Detector with high-resolution converters for audio and measurement applications to power-optimized 8 or 16 and 32 bit micro-controllers.
Over 30 years of experience in the integration of silicon IP components, providing services for ASIC/SoC design and fabrication with its own EDA solutions, make DOLPHIN Integration a genuine one-stop shop addressing all customers' needs for specific requests.
It is not just one more supplier of Technology, but the provider of the DOLPHIN Integration know-how!
Related Semiconductor IP
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
- Ethernet 800G PCS IP
- CHI to UCIe Bridge IP
Related News
- Dolphin Integration announce the availability of new ROM TITAN and ultra low leakage standard cell library SESAME BIV at TSMC 55 nm LP eFlash
- Dolphin Integration reveals its unique Regulator offering for IoT markets at 55 nm
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP
- Safe and Secure Technologies, the new BSC and UPC spin-off that will design chips for critical sectors where “failure is not an option”
Latest News
- StarFive and LECARC Forge Partnership to Co-Develop RISC-V Server CPUs and Seize New Opportunities in the Agentic AI Era
- ASICLAND Selected as SK hynix’s Partner for Next-Gen eSSD Development, Establishing a ‘K-Semiconductor Win-Win’ Model
- onsemi to Acquire Synaptics to Enable the Next Generation of Intelligent Systems for Physical AI
- EdgeAI Licensed Andes Technology CPU IP to Power Next-Generation Edge AI Neuromorphic Solution
- Jim Keller: ‘AI Still Obeys the Old Laws of Compute’