ASICFPGA releases new AI 2D+3DNR core
Ocotober 29, 2026 -- ASICFPGA has announced the release of the AI 2D+3DNR core, a deep-learning noise reduction IP core for camera systems. The AI 2D+3DNR core is offered as a separate IP. It removes both spatial and temporal noise, including color noise and luminance noise, and keeps edges and fine texture in very low light. The deep-learning motion compensation aligns the previous frame with the current frame before temporal filtering, so moving objects keep their detail and ghost images are reduced. The noise reduction strength follows the sensor gain, so no manual tuning is needed from normal light to very low light.
Features of the AI 2D+3DNR core:
Deep-learning spatial noise reduction + temporal noise reduction- Deep-learning motion compensation for temporal filtering (fewer ghost images)
- Noise reduction strength set automatically by the sensor gain
- Bayer domain processing
- Verified at 1920x1080 30 fps on AMD Kria KV260 (Zynq UltraScale+ MPSoC) with Sony IMX678
Low-light comparison videos with our existing 2D+3DNR IP, at sensor gains from 18 dB to 48 dB, are on the AI 2D+3DNR page.
Explore ASICFPGA IP:
Related Semiconductor IP
- Deep-learning noise reduction IP core
- Bayer Color Filter Array Interpolation Core
- Multiple Pixel Processing Camera Image Signal Processing Core
- WDR (Shadow and Highlight Compensation Core)
- Advanced 2D Noise Reduction core
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