Latest version of SystemC, IEEE 1666-2011, now supports TLM 2.0
Chocolate and peanut butter go together. So do SystemC and transaction-level modeling. Just not officially. Until now. Earlier this month, the IEEE Standards Board approved a revision to the IEEE 1666 SystemC standard to bring the widely used OSCI (Open SystemC Initiative) TLM 2.0 interfaces into the game. These interfaces define how TLM models communicate and standardization of these interfaces within IEEE 1666 will improve model interoperability and will encourage model reuse at high abstraction levels. All of this technology forms a critical infrastructure for virtual prototyping—an essential part of future System and SoC Realization efforts.
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