4 Ways that Digital Techniques Can Speed Up Memory Design and Verification

By Synopsys, Inc.

December 14, 2022

Memory continues to be in big demand for our data-driven, smart everything world. It’s what enables your smartphone to store photos, videos, and apps; your car to brake ahead of a roadway obstacle; and building security systems to recognize your face and let you enter. Its use for storage in data-intensive applications and in support of real-time processing performance is ushering in a shift from general-purpose memory devices to more customized chips that meet specific performance, power, and bandwidth targets for applications like AI, servers, and automotive.

Globally, the market for memory chips is anticipated to grow from U.S. $154.4 billion in 2021 to U.S. $410.71 billion by 2027, according to IMARC Group market research firm. Increasing digitization and automation in the electronics industry, along with increasing prevalence of semiconductors in a variety of systems, are driving the market growth.

Yet, in the face of growing demands for more memory, more application-specific variants of memory chips, and complex architectures such as multi-die, development teams are facing serious time-to-market pressures. One way to accelerate turnaround time is to shift the memory development process left, while adopting design and verification techniques that have proven themselves on the digital side.

Read on to learn about four key ways that digitizing design and verification in the memory space—particularly the memory circuitry on the boundary of the array—can generate substantial productivity and turnaround time benefits.

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