Lowering Energy Consumption in Always-on IoT Designs
As a lead design engineer on the Tensilica R&D team, Dr. Avinash Lingamneni certainly understands the trials and tribulations of developing always-on applications for the Internet of Things (IoT), wearable, and wireless markets. His team develops Cadence’s Tensilica Fusion DSP. Over the summer, Avinash, who has a Ph.D. in electrical and computer engineering from Rice University, discussed energy-efficient signal processing for IoT applications at the Linley IoT Conference. Afterwards, we sat down to discuss IoT processors, cognitive layering, and Avinash's unique approach to lowering energy consumption in computers. Listen in.
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