Link Training: Establishing Link Communication Between DisplayPort Source and Sink Devices
Link training is the first stepping stone to enabling the communication channel between source and sink devices. This is where the electrical characteristics of the link along with the bitrate are fixed, and are subsequently used for the data transfers. Here the challenge for the verification engineers lies in verifying the designs for numerous combinations that are possible in the link training process.
Link training between DisplayPort source and sink devices consists of two distinct tasks that must be completed successfully and in sequence, to establish the link before frame transfers can be initiated by the source.
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