How Synopsys and NVIDIA Are Accelerating Semiconductor Scaling in the AI Age
For decades, the task of creating masks for the manufacturing process has been an integral part of semiconductor manufacturing. As we move to more advanced nodes like 5nm, 3nm to 2nm, accelerating computational lithography turnaround time is instrumental in getting the chips fabricated efficiently in semiconductor manufacturing companies. Synopsys has been a pioneer in this area with advanced techniques to accelerate distributed processing in areas like supercomputers.
Our latest collaboration with NVIDIA to run Synopsys Proteus Optical Proximity Correction (OPC) software on the NVIDIA cuLitho software library is just one example of how we are providing another powerful way to accelerate that process on GPUs, taking it from weeks to days.
What this means for foundries and customers using these solutions is substantially faster turnaround times to develop chips on increasingly smaller process nodes. “As applications such as AI and machine learning drive the demand for greater density from smaller chips, lithography processes need a substantial speed boost to keep up with the pace of innovation,” said Vivek Singh, vice president, Advanced Technology Group, NVIDIA. “By collaborating with Synopsys, we are accelerating the massive computational workloads that currently consume tens of billions of CPU hours every year, enabling the creation of new lithography solutions and more predictability in future semiconductor technologies.”
Read on to learn more about why this collaboration is good news for semiconductor scaling—and every application demanding more performance from smaller footprints.
To read the full article, click here
Related Semiconductor IP
- Ultra Ethernet MAC & PCS 100G/200G/400G/800G
- Ethernet PCS 100G/200G/400G/800G/1.6T
- Ethernet MAC 100G/200G/400G/800G/1.6T
- Junction Over-Temperature Detector with Linear Centigrade-to-Voltage Output - X-FAB XT018
- Performance P570 Gen 3
Related Blogs
- Analog Design and Layout Migration automation in the AI era
- Arm in the agentic era: Scaling the converged AI data center
- How Chip Startups Are Changing the Way Chips Are Designed
- The Integrated Design Challenge: Developing Chip, Software, and System in Unison
Latest Blogs
- Inside the SiFive Performance™ P570 Gen 3: High Performance Efficiency for Next-Generation Consumer and Commercial Applications
- What the steam engine can teach us about modern chip design
- Automotive silicon in the era of AI, functional safety, and cybersecurity
- JPEG XS Officially Joins GenICam, The Machine Vision Standard Managed By EMVA
- Beyond PCIe Compliance: Why Stress Testing Is Crucial for Edge AI Deployments