How Will High-Level Synthesis Affect the Make vs. Buy vs. Re-use Decision?

By Cadence

November 22, 2011

During the planning phase for SoC designs, teams have to choose whether to "make or buy" the pieces of IP that will compose the SoC. The drivers of this decision are well-chronicled in a recent article by Ann Steffora Mutchler, appropriately titled "Make vs. Buy". I won't re-hash it here, though I might add one choice: reuse. Except for startups, most chip designs have IP internally that they can re-use from previous projects. The ability to re-use blocks is often lacking, as new process nodes or applications have different requirements, or perhaps the block was not designed for re-use in the first place. I wrote a post a couple months ago that detailed why designing with SystemC TLM enables more re-use. But that post did not venture into "what could this mean?"

Let's re-visit each piece of the "make vs. re-use vs. buy" decision and speculate on the impact on each of moving to higher-level abstraction design:

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