Xilinx Buys AutoESL, Securing High-Level Synthesis Capabilities
Xilinx has acquired high-level synthesis start-up AutoESL Design Technologies, bringing the AutoPilot high-level-synthesis tool in-house. AutoPilot accepts a C, C++, or SystemC description of the functionality of an algorithm or task and generates a register-transfer-level (RTL) implementation in Verilog or VHDL. The RTL implementation is then processed through the traditional FPGA RTL logic synthesis, place-and-route, and verification tool flow. Like other high-level synthesis tools, AutoPilot offers time savings in the RTL design and coding process, and speeds the verification process by enabling much of the verification work to be done at the C, C++, or SystemC level, where simulations are dramatically faster than those at the register or gate level.
To read the full article, click here
Related Semiconductor IP
- Ultra Ethernet MAC & PCS 100G/200G/400G/800G
- Ethernet PCS 100G/200G/400G/800G/1.6T
- Ethernet MAC 100G/200G/400G/800G/1.6T
- Junction Over-Temperature Detector with Linear Centigrade-to-Voltage Output - X-FAB XT018
- Performance P570 Gen 3
Related Blogs
- How Will High-Level Synthesis Affect the Make vs. Buy vs. Re-use Decision?
- A Decade of Building CODECs with High-Level Synthesis
- Building Neural Networks with High-Level Synthesis
- PLD Overview: Xilinx and Altera
Latest Blogs
- Inside the SiFive Performance™ P570 Gen 3: High Performance Efficiency for Next-Generation Consumer and Commercial Applications
- What the steam engine can teach us about modern chip design
- Automotive silicon in the era of AI, functional safety, and cybersecurity
- JPEG XS Officially Joins GenICam, The Machine Vision Standard Managed By EMVA
- Beyond PCIe Compliance: Why Stress Testing Is Crucial for Edge AI Deployments