Emulation: Have It Your Way
In May 2014, Burger King announced it was scrapping its 40-year-old slogan, "Have it your way." I say, let's make it our own to describe the hardware emulation space, where the tools are having a remarkable impact on taming the verification challenges facing system-on-chip designers.
It wasn't all that long ago when hardware emulation was hardly mentioned as a practical solution to these challenges. If it were to be mentioned, the remarks may have included an eye roll or a shoulder shrug. Oh, sure, verification engineers could be seen making their way to a far-off back room to use a clunky, big-box emulator nested in the middle of a dreadful convolution of long and unreliable cables to debug a graphics chip or microprocessor.
Those were the days when emulators were hard to use, required a full-time on-site specialist, and came with a fire extinguisher because of their tendency to overheat (regularly). The software support was rather rudimentary -- especially when compared to modern offerings -- and mainly limited to the compilation of the register transfer level (RTL) code into the emulation box. They were also single-user resources that were expensive to purchase and even more so to maintain. It wasn't unusual for their cost to exceed the entire budget allocated to the verification task of a new design. Few project teams could justify one in their budget.
To read the full article, click here
Related Semiconductor IP
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
- Ethernet 800G PCS IP
- CHI to UCIe Bridge IP
Related Blogs
- The Future of Hardware Emulation
- A Great Match: SoC Verification & Hardware Emulation
- Hardware Emulation: One Verification Tool, Unending Possibilities
- Today's Complex Networking Chips Demand Hardware Emulation
Latest Blogs
- CDM Dependence on Device Capacitance
- What the Cyber Resilience Act means for the future of chip design
- When Your IP Vendor Has Operated 150,000 Base Stations: Introducing Viettel Semiconductor
- Relationship between architecture and validation in system design
- The Post-Quantum Cryptography Mandate: Building Cryptographically Agile Systems for the Quantum Era