Applying Digital-Centric Verification Methodologies to Analog

By Cadence

January 13, 2011

A majority (if not all) SoCs today are mixed signal. Increasingly, the analog and digital portions of the design are inseparable. It is not possible any more to decompose them into separate analog and digital functions. Nothing can be treated as a black box and handed off to the other side. The new world is a complex, multilayered fusion of the two disciplines where the boundaries are getting fuzzy and the interactions are complex and poorly modeled. This requires an integrated mixed-signal environment.

A performance failure is generally not fatal because the system development can usually continue while the IC is re-spun for performance improvement. However, functional failures in a design can result into multiple design iterations (re-spins). These are usually at great expense in terms of non-recurring engineering costs (NRE) and missed market windows. "Top Level Verification" is one of the most critical challenges for our customers in mixed-signal verification. To ensure the reliability of the mixed-signal verification results, the first step is to integrate the analog and digital mixed signal environments. Figure 1 illustrates the integrated mixed-signal verification environment offered by Cadence Design Systems

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