Video: New Cadence Verification IP Catalog (With Denali Inside!)
Clearly UVM 1.0 was the main story at DVCon last week, but there was other big news in verification IP that bears repeating. Specifically, last week Cadence announced a new Verification IP ("VIP") Catalog -- a complete combination of standards-based Cadence and ex-Denali verification IP, supporting 3rd party simulators and hardware-assisted verification. In this video taken on the DVCon 2011 expo floor, my colleague Tom Hackett hits the highlights:
Related Semiconductor IP
- DSP-Based 112G SerDes
- XTAL oscillator in TSMC-7nm
- GPU
- V-by-One Verification IP
- AI model compression IP
Related Blogs
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- AMBA LTI Verification IP for Arm System MMU
- Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs
- Industry's First Verification IP for Arm AMBA CHI-G
Latest Blogs
- Embedded Security explained: Secure boot for embedded systems
- World's First Standards-Compliant 112G PHY IP for Linear Optics: A Turning Point for AI Interconnects
- One Key for Every Door: How Aliro Extends the UWB Digital Key Beyond the Car
- Reprogrammable Post-Quantum Security for SoCs: Why Crypto-Agility Matters
- Designing the Beam Steering Core for a C-Band AESA: A Look at VSI's VBF0644 GaAs Beamformer IC