Cadence EDA360 is Paper!
Hard to believe a year has gone by since the big announcement of the Cadence Blueprint to Battle ‘Profitability Gap’; Counters Semiconductor Industry’s Greatest Threat! Having spent more time on it that I should have, here is my opinion on EDA360 on its first anniversary.
To read the full article, click here
Related Semiconductor IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
- UCIe 2.x Controller IP
- SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP
- OpenTitan-based RISC-V Secure Element
Related Blogs
- Cadence EDA360 Redux!
- EDA360 Is More Than Design IP Plus Software Drivers
- ARM's Cortex-A15: A big step up for the ARM processor architecture. Targeting 32nm and 28nm technology nodes
- When will you be facing these 28nm design challenges?
Latest Blogs
- From Bug Hunting to Engineering Methodology: Lessons from AI-Driven Development
- Manufacturing Intelligence: Turning EDA Data into Trusted Action
- Execute-in-Place: Getting More from Embedded NVM
- Rethinking RTL flows with AI-driven hybrid formal verification
- Arm and NVIDIA: Building the trusted compute foundation for the agentic AI era