Cadence EDA360 Redux!
May 10, 2010
“Cadence Design Systems, Inc. (NASDAQ: CDNS), the global leader in EDA360………”
Of course, why wouldn’t Cadence be the global leader in something they just made up? As a follow-up to my yawningly successful blog Cadence EDA360 Manifesto:
One of the problems I have with EDA360 is the fear, uncertainty, and doubt (FUD) it attempts in the paragraph “from creators to integrators”. It argues that maintaining Moore’s law depends on “a continuing migration to lower process nodes to gain performance, power, and cost advantages”. It further claims that Moore’s law hit a wall due to rising development costs?
Related Semiconductor IP
- Mesochronous Bridge for PCIe/CXL
- AI-native GPU
- OpenGMSL Verification IP
- OpenGMSL Leaf IP
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
Related Blogs
- EDA360 Is More Than Design IP Plus Software Drivers
- ARM's Cortex-A15: A big step up for the ARM processor architecture. Targeting 32nm and 28nm technology nodes
- When will you be facing these 28nm design challenges?
- Between ASIC and microcontroller: It's all about System Realization
Latest Blogs
- Automated, Faster Specification to Sign-Off with IDS-AI
- NovaTech Automation Crius PIU: Bringing Conventional Instrument Transformers onto the IEC 61850 Process Bus
- Single Pair Ethernet and TSN: The In-Robot Network Behind the Next Humanoid Robots
- A design path to success exists for ultra-low-voltage SoCs
- Where Routine Flow Ends Veriest Formal Expertise Begins