32Gbps SerDes IP in TSMC 12nm FFC
The relentless demand for higher data throughput in data centers and high-performance computing (HPC) systems drives the need for…
- TSMC
- 12nm
- FFC
32Gbps SerDes IP in TSMC 12nm FFC
The relentless demand for higher data throughput in data centers and high-performance computing (HPC) systems drives the need for…
32Gbps SerDes IP in TSMC 22nm ULP
The relentless demand for higher data throughput in data centers and high-performance computing (HPC) systems drives the need for…
The USB Super-Speed+ PHY IP is a compact and power-efficient interface solution that fully supports the USB 3.2 Gen1 and Gen2 spe…
The SLVS-EC RX PHY IP is a high-speed, low-power receiver macro compliant with SLVS-EC v3.0 specification, enabling reliable para…
20G MSS (Multi-standard SerDes) PHY
20G MSS (Multi-standard SerDes) PHY
Empowering customers to thrive in the AI Era, INNOSILICON™ introduces its most 112G SerDes (Serializer/Deserializer) and Controll…
The UniIC GDDR6 PHY,subsequently referred to as the UNIIC_GD6PHY, is designed for performance and power efficiency, its target is…
The GR2000 BLE Platform IPs are wireless IP targeting Bluetooth Low Energy applications.
PCIe Controller is a high performance PCIE controller, it can support PCIE 1.0/2.0/3.0/4.0 protocol, and the support speed is 2.5…
The USB PHY IP is UTMI interface compatible and a dedicated circuit for full-function USB 2.0 transceivers.
The DisplayPort 1.4 Transmitter PHY is for transmitting high-definition video and audio, making it an ideal choice for a wide ran…
Wi-Fi 7(be) RF Transceiver IP in TSMC 22nm
The Wi-Fi 7 (802.11be) RF transceiver IP, operating in 2.4GHz / 5GHz / 6GHz bands, is tailored for next-generation high-performan…
ONFI 3.2 NAND Flash PHY IP Compliant to JEDEC
The Open NAND Flash Interface (ONFI) is an Open standard for NAND Flash Memory chips.
MIPI D-PHY Analog Transceiver IP Core
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI®) Alliance was created to d…
Combination MIPI CPHY-DPHY Analog Interface
The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited channel, allowing more data without an increased signaling clock.
ONFI 5.0 NAND Flash Controller IP Compliant to JEDEC
The NAND flash controller IP provides easy, reliable access to an off-chip NAND flash.
This Tx/Rx transceiver complies with the MIPI Alliance C-PHY℠ v2.0 and D-PHY℠ v2.5 specifications, with world-class area and powe…
The MXL-DS-LVDS is a high performance 4-channel LVDS Deserializer implemented using digital CMOS technology.
The MXL-SR-LVDS is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology.
DSP 10/100 100B-TX Ethernet PHY
SMS 10/100 ETHERNET PHY performs IEEE 802 10Base-T and 100Base-TX functionality as illustrated in Block diagram.