Learn more about Multi-Protocol PHY IP core
Under the agreement, Qualitas Semiconductor will supply a MIPI Sub-system that integrates a MIPI D-PHY TX/RX, a MIPI CSI-2 Controller RX and a MIPI DSI-2 Controller TX into a single solution.
Through the case of Company A, a developer of IVI, ADAS, and domain controller SoCs, we examine the design, verification, and debugging benefits of sourcing MIPI C/D-PHY, PCIe, and HSSTP from a single vendor portfolio.
This post provides an in-depth look at the fundamentals of high-speed interconnects, AI/HPC trends (HBM/D2D/CPO), and the three critical requirements of Physical AI: Deterministic Latency, Functional Safety (ISO 26262), and Automotive Reliability (AEC-Q100).
This agreement is significant as it demonstrates that Qualitas’s MIPI C/D-PHY IP has been recognized for its operational stability and performance in next-generation process environments, including 2nm, while securing a key customer reference in the North American market.
Under the agreement, Qualitas will deliver an integrated interface solution combining its 8nm process-based MIPI D-PHY TX/RX PHY IP with its MIPI CSI-2 TX/RX Controller IP. Moving beyond the traditional standalone PHY IP model, the company is expanding its portfolio to include optimized sub-system solutions that integrate both PHYs and controllers, maximizing technical synergy.
QUALITAS SEMICONDUCTOR announced today that it has signed a licensing agreement with an automotive semiconductor fabless company in Korea for 5nm process-based automotive interface IP.
