High performance, low power and area efficient memory interface solutions conforming to LPDDR5/5X (JESD209-5C) JEDEC standard
- Controller + PHY
- LPDDR5
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
High performance, low power and area efficient memory interface solutions conforming to LPDDR5/5X (JESD209-5C) JEDEC standard
TSMC N3E 1.8V IO Platform supporting cells
TSMC N3E 1.8V IO Platform supporting cells
Support cells for TSMC N4P 2.5V IO Platform MS Add-on
Support cells for TSMC N4P 2.5V IO Platform MS Add-on
Support cells for TSMC N4P 2.5V IO Platform
Support cells for TSMC N4P 2.5V IO Platform
Contain supply cells, power management, ring building, analog cells for TSMC N4P 1.8V IO Platform MS add-on
BaseKit contains supply cells, power management cells, ring building cells, other common cells for TSMC N6 3.3V IO
Support cells for TSMC N5 2.5V IO Platform
Support cells for TSMC N5 2.5V IO Platform
Low Power RISCV CPU IP
MIPI D-PHY
Bandgap
High-Speed PLL
Coherent Network-on-Chip (NOC)
Scalable and area efficient interconnect solution optimized for memory coherent systems
High performance, low power and area efficient memory interface solutions conforming to DDR5 (JESD79-5) and DDR4 (JESD79-4) JEDEC…
Silterra 0.11um Ultra Low Leakage 6track Std Cell Library
Silterra 0.11um Ultra Low Leakage 6track Std Cell Library
SMIC 0.13um Low Leakage 6 track High Density Multi-Bits Flip-Flop
IP
IP
IP
IP
HHGrace 0.11um ULL 7track ECO Library
HHGrace 0.11um Ultra Low Leakage 7track ECO Library
HHGrace 0.11um ULL 7track Power Management Kit
HHGrace 0.11um Ultra Low Leakage 7track Power Management Kit