SMIC 0.18um 1.8v APLL with Free Running
This IP is a programmable Analog PLL suitable for high speed clock generation.
- SMIC
- 180nm
- G
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SMIC 0.18um 1.8v APLL with Free Running
This IP is a programmable Analog PLL suitable for high speed clock generation.
To provide a solution to MMC cards, SMIC18_MMC_07E_4IN1 is consolidated by four independent IPs: SMIC18_PRG_03E_33T18V60_160mA, S…
SMIC 0.18um 1-Channel 12-bit 200K 3.3V Multi-Input SAR A
This analog-to-digital converter (ADC) is a one-channel SAR ADC with multi-input PGA and bandgap.
SMIC 0.18um 12-bit 1M/200K Single-Ended 3.3v Rail to Rail SAR ADC
This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.
SMIC 0.13μm 1.2v 300MHz Ring Oscillator
The present IP is a Ring Oscillator which is controlled by external bias current from bandgap.
SMIC 0.13um 3.3V Power On Reset
Present Power on Reset generates system reset signal (POR33) when 3.3V power supplier (VIN33) is turned on.
SMIC 0.13um 1.8V Power On Reset
Present Power on Reset generates system reset signal (POR18) when 1.8V power supplier (VIN18) is turned on.
SMIC 0.13um 1.2V Power On Reset
Present Power on Reset generates system reset signal (POR12) when 1.2V power supplier (VIN12) is turned on.
SMIC 0.13um 1.2V Power On Reset
Present Power on Reset generates system reset pulses (POR12) when 1.2V power supplier (VIN12) is turned on.
SMIC 0.13um 3.3V/1.2V Power on Reset
The present Power-On-Reset circuit generates system reset pulses (RST) when both the 3.3V and 1.2V power suppliers are turned on.
SMIC 0.13μm 1.62~3.3v->1.2v Power Regulator
Targeted in SMIC 0.13μm 1.2v/3.3v logic process, current design of Power Regulator is to provide 1.2v power supply which is regul…
SMIC 0.13μm 1.62~3.3v->1.2v Power Regulator
Targeted in SMIC 0.13μm 1.2v/3.3v logic process, current design of Power Regulator is to provide 1.2v power supply which is regul…
This IP is a programmable Analog PLL suitable for high speed clock generation.
This IP is a programmable Analog PLL suitable for generating system clock.
This PLL is designed for audio clock generation.
SMIC 0.13um 1Channel 10Bit 10MHz DAC
S13V33_R2RDAC_01 is a 10bit@10MHz DAC IP which implements a 7-bit (from D [0] to D [6]) R2R_Ladder and 3-bit thermometer decoder …
IBM 65nm 24-bit Stereo Sigma-Delta ADC
The I65GV25_ADC_01 specifies the design of a high-performance 24-bit stereo Audio ADC for portable digital audio systems.
IBM 65nm 24bit Sigma-Delta DAC
The I65GV25_DAC_01 specifies the design of a high-performance 24-bit stereo Audio DAC for portable digital audio systems.
This PLL is designed for audio clock generation.
This analog 2-1 MUX is designed for low speed application.