MACsec Protocol Engine for 10/100/1000 Ethernet
The MAC-SEC-1G IP core implements a compact and configurable custom-hardware protocol engine for the IEEE 802.1AE (MACsec) standa…
- MACsec
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
MACsec Protocol Engine for 10/100/1000 Ethernet
The MAC-SEC-1G IP core implements a compact and configurable custom-hardware protocol engine for the IEEE 802.1AE (MACsec) standa…
Autonomous Audio assembly with PDM to PCM with integrated smart DMA and VAD
This Voice assembly is an assembly of a PDM to PCM IP with an integrated smart DMA to autonomously manage data transfer without w…
24-bit PDM to PCM 115 dB SNR PLL-less 2 channels
sDSA-SW1.01 is a PDM-PCM converter to interface with a digital microphone.
The agilePVT Sensor Subsystem is a low power integrated macro consisting of Process, Voltage, and Temperature sensors, and associ…
The agileSMU Subsystem is a low power integrated macro consisting of the essential IP blocks required to securely manage waking u…
The agilePMU Subsystem is an efficient and integrated Power Management Unit for SoCs/ASICs.
SHA-384 and SHA-512 Secure Hash Crypto Engine
The SHA-384/512 is a high-throughput, and compact hardware implementation of the SHA-384 and the SHA-512 cryptographic hash funct…
The agileSensorIF Subsystem is an efficient and integrated sensor interface for SoCs/ASICs.
Voice Activity Detection IP-Core
Phonemic proposes a unique Voice Activity Detection (VAD) IP-Core based on algorithms that are able to distinguish between betwee…
LC3plus Audio Codec IP for Bluetooth LE Audio
The LC3plus audio codec is a optimized and efficient audio codec introduced for Bluetooth LE Audio, DECT and VoIP that dramatical…
D301 is the MPEG-5 Low Complexity Enhancement Video Coding (LCEVC) decoder IP solution.
Low Power 5V->3.0V Cap-less LDO IP Core
A 5V -> 3.3V low power LDO (Low Drop-Out) is a type of voltage regulator designed to provide a stable output voltage of 3.3 volts…
Maintains a database of outstanding orders.
Controller + ATC + ATS + DTI · RC/EP · x1–x16 · 1 GHz · PCI-SIG certified
Coherent Network-on-chip (NoC) IP
UCIe D2D · CHI Rev E.b · Mesh & Ring · iNoCulator-generated RTL
Non-coherent Network-on-chip (NoC) IP
NC-NOC · AXI4 · Low power · All dies
Low-Power Deeply Embedded RISC-V Processor
The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core.
TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory comp…
MSquare offers a silicon-proven ONFI 5.0 PHY IP that supports all modes of the Open NAND Flash Interface (ONFI) 5.0 specification.
High-speed configurable I/O capable of signaling speeds of up to 3.2 GT/s supporting the following I/O standards