Vendor: Agile Analog Category: PVT Monitor

PVT Sensor Subsystem

The agilePVT Sensor Subsystem is a low power integrated macro consisting of Process, Voltage, and Temperature sensors, and associ…

Overview

The agilePVT Sensor Subsystem is a low power integrated macro consisting of Process, Voltage, and Temperature sensors, and associated reference generator, for on-chip monitoring of a device's physical, environmental, and electrical characteristics. The monitoring of process, voltage and temperature variations are critical to optimize power and performance for modern SoCs/ASICs, especially for advanced node and FinFET processes.

Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Intel Foundry, Samsung Foundry, UMC and Other Foundries.

Key features

Temperature Sensor

  • Measurement range: -40oC to +125oC 
  • Accuracy (Uncalibrated) +/-5°C 
  • Accuracy (Calibrated) 
  • -20°C to +100°C = +/-2°C 
  • 0°C to +50°C = +/-0.5°C 

Voltage Sensor

  • Accuracy (Uncalibrated) 50mV 
  • Accuracy (Calibrated) 10mV

Process Sensor

  • In-chip monitoring of process variation 
  • Ring oscillator-based design to suit application requirements 
  • Scan-enabled to provide testability

agilePVT Subsytem

  • Start-up time: Typ 20us 
  • Current consumption: Max 25uA 
  • Industry standard digital interface 
  • Fully integrated macro 
  • Standard AMBA APB interface

Block Diagram

agilePVT block diagram

Specifications

Identity

Part Number
agilePVT
Vendor
Agile Analog
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Agile Analog
HQ: United Kingdom

Learn more about PVT Monitor IP core

Overcoming power management IP challenges

With modern chips, power management sits right at the core of the architecture. Between scaling down to advanced nodes and pushing for maximum performance-per-watt, managing power has become one of the most complex, high-risk parts of silicon design. Here is what engineering teams are actually dealing with.

Understanding security certification and how analog IP can help

This Agile Analog blog post outlines the security certification process and the impact of implementing analog anti-tamper solutions. With new security measures such as the EU’s Cyber Resilience Act (CRA) regulations becoming fully enforced in 2027, there is increasing interest in security certification and the analog IP that companies can use to detect and prevent security attacks.

Providing protection against EMFI attacks

This Agile Analog blog post is focused on describing the dangers of Electromagnetic Fault Injection (EMFI) attacks and outlining the importance of EMFI sensors that are designed to provide protection.

Frequently asked questions about PVT Monitor IP cores

What is PVT Sensor Subsystem?

PVT Sensor Subsystem is a PVT Monitor IP core from Agile Analog listed on Semi IP Hub.

How should engineers evaluate this PVT Monitor?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PVT Monitor IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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