13 bits 2.56MS/s SAR ADC - TowerJazz 0.18um
13 bits 2.56MS/s successive approximation ADC.
- 13 Bit
- Tower
- 180nm
- SL
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
13 bits 2.56MS/s SAR ADC - TowerJazz 0.18um
13 bits 2.56MS/s successive approximation ADC.
Tiny Area High Performance Microcontroller
The DT8051 is an area optimized, tiny soft core of a single-chip 8-bit embedded microcontroller, based on the World's fastest and…
The HSCAN IP is a high speed CAN Transceiver for automotive 12V applications.
The 60 GHz PA is a power amplifier designed for applications in the 57 – 64 GHz frequency range.
The 60 GHz LNA is a low noise amplifier designed for applications in the 57 – 64 GHz frequency range.
This hardware IP core features a full Secure Hash Algorithm SHA1.
USB4.0 router, Certified USB 5G/10G and 20G Device controller
USB 5G,10G, 20G and 4.0 Device router controller is a configurable core and implements the USB device functionality and can be in…
Digital I/Q Imbalance correction IP for Wireless Applications
The IQE 100 is a wideband imbalance correction IP, that digitally match in-phase and quadrature signal paths in radio architectur…
This hardware IP core is a ZBT SRAM controller capable of automatically managing single address and full continuous burst read/wr…
This IP core features a full-hardware sound compressor using the algorithm IMA ADPCM.
Bilinear Bayer to RGB converter for Image Sensors
This hardware IP core features a high speed and quality Bilinear Bayer to RGB converter.
High-Performance, Configurable, 8-bit Microcontroller
The R8051XC2 configurable processor core implements a range of fast, 8-bit, micro-controllers that execute the MCS®51 instruction…
Low-Power Bandgap Reference Circuit - UMC 0.09um
High precision Bandgap Reference Circuit with very low Power consumption of less than 10µA
TC1700 is a FEC receiver adressing LTE, LTE-A, WiMAX, HSPA/+, and legacy 3G standard.
PSI2488-U9 is a GPON ONT SERDES capable of receiving serial data at the rate of 2.488Gbps and transmitting data at the rate of 1.…
Audio PLL - Fractional-N ±0.05 ppm accuracy
This PLL can generate all the frequencies used by audio systems from a stable clock of 10 to 40Mhz.
Common Scrambling Algorithm IP core
The Helion DVB-CSA cores implement the ETSI specified Common Scrambling Algorithm (CSA) which is used to provide the conditional …
3GPP LTE 3GPP2 1xEV-DO Turbo Decoder with Ping Pong Input and Output Memories
This is a fully compatible 3GPPTM LTE and 3GPP2 1xEV-DO Release B turbo decoder with ping-pong input and output memories.
Great River's ARINC 818 IP Core provides an easy way to implement ARINC 818–compliant interfaces in Xilinx and Altera PLDs.
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturin…