How Secure DDR Interfaces Protect DRAM from Memory Attacks
Brett Murdock, Dana Neustadter (Synopsys)
Vendor:
VISENGI
Category:
DDR
ZBT SRAM memory controller
This hardware IP core is a ZBT SRAM controller capable of automatically managing single address and full continuous burst read/wr…
Overview
This hardware IP core is a ZBT SRAM controller capable of automatically managing single address and full continuous burst read/writes to ZBT SRAM memory chips.
Key features
- Customizable to any ZBT SRAM memory chip combination.
- Customizable to any FPGA bus (Wishbone, AMBA, OPB, etc.).
- Continuous burst reads/writes.
- Single cycle reads/writes.
- Individual byte enables.
What’s Included?
- Full technical support up to successful client integration
- Documentation and design examples
- Complete Testbench
- Synthesis scripts and results
- Instantation Template
Specifications
Identity
Part Number
ZBT SRAM Controller
Vendor
VISENGI
Type
Silicon IP
Controller / PHY
Controller
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Spain
Learn more about DDR IP core
The complete series of high-end DDR IP solutions of Innosilicon is industry-leading and across major foundry processes
In recent years, emerging industries such as AI, Internet of Things, 5G, and intelligent networked vehicles have flourished, and the high requirements for performance have greatly increased the scale and complexity of chips, constantly challenging IP limitations.
Secure DDR DRAM Against Rowhammer, RAMBleed, and Cold-Boot Attacks
Dana Neustadter, Senior Product Manager for Security Solutions, and Brett Murdock, Director, Product Line Management for Memory Interface IP, Synopsys Solutions Group
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This whitepaper provides an overview of the JEDEC memory standards to help SoC designers select the right memory solution, including IP, that best fits their application requirements.
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Frequently asked questions about DDR Interface IP
What is ZBT SRAM memory controller?
ZBT SRAM memory controller is a DDR IP core from VISENGI listed on Semi IP Hub.
How should engineers evaluate this DDR?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DDR IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.