Overview
The DT8051 is an area optimized, tiny soft core of a single-chip 8-bit embedded microcontroller, based on the World's fastest and most popular DP8051 core, available since over 8 years. The DT8051 soft core is 100% binary-compatible with the industry standard 8051 8-bit microcontroller. It has a very low gate count architecture, giving 6 650 ASIC gates for the complete system, including DoCD on-chip debugger. Dhrystone 2.1 benchmark program runs exactly 8.1 times faster, than the original 80C51 at the same frequency. The same C compiler was used for benchmarking of the core vs 80C51, with the same settings. The DT8051 includes a 2-wire DoCD on-chip debugger (TTAGTM), up to eight external interrupt sources, an advanced Power Management Unit, Timers 0&1, I/O bit addressable Ports, full duplex UART and interface for external SFR. The DT8051 Core has a built-in support for the 2-wire TTAGTM interface - DCD Hardware Debug System, called DoCD . This version of the debugger is dedicated for applications, where a number of external pins is limited.
The DT8051 is delivered with fully automated testbench and complete set of tests, allowing easy package validation at each stage of SoC design flow.
Each of DCD's 8051 Cores has a built-in support for the DCD Hardware Debug System, called DoCD . It is a real-time hardware debugger, which provides debugging capability of a whole System on Chip (SoC).
Unlike other on-chip debuggers, the DoCD provides non-intrusive debugging of running application. It can halt, run, step into or skip an instruction, set breakpoints, watchpoints, read/write any contents of microcontroller, including all registers, internal and external program memories and all SFRs, including user defined peripherals.
Learn more about MCU IP core
DESPI eSPI Controller IP Core and DESPI eSPI IP Core Target deliver a complete, high-speed eSPI interface solution for FPGA and ASIC designs.
DCD-SEMI introduces a new CryptOne extension supporting EdDSA25519 signatures and X25519 key exchange, delivering high security, low latency, and efficient hardware implementation for modern SoC and FPGA designs.
DCD-SEMI, a provider of silicon-proven IP solutions, announces the availability of the DI3CM-HCI, an advanced MIPI I3C Host Controller Interface (HCI) IP Core designed to modernize peripheral connectivity in embedded, IoT, consumer, and industrial systems.
DAES IP Core is a high-performance solution that accelerates AES encryption and decryption for modern secure systems. Supporting 128- and 256-bit keys across multiple modes—including ECB, CBC, CFB, OFB, and CTR—DAES delivers ultra-fast throughput and easy integration.
DCD-SEMI today announced that its complete automotive IP Cores family — including Classical CAN, CAN FD, CAN XL but also LIN, PSI5 and SENT —is now available as Safety Element out of Context for ISO 26262 functional safety up to ASIL-D, the highest Automotive Safety Integrity Level.
Joining MIPI Alliance marks a significant step in DCD-SEMI’s commitment to delivering industry-compliant, high-performance IP cores to its global customers. As part of this initiative, DCD-SEMI will showcase its latest I3C IP core during the upcoming MIPI Plugfest, held in Warsaw on June 23-24, 2025.