9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLPeF Sesame 9T a unique architecture based on 9-track cells, optimized for High Density and Low Dynam…
- TSMC
- 55nm
- GP
- Silicon Proven
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLPeF Sesame 9T a unique architecture based on 9-track cells, optimized for High Density and Low Dynam…
Linear Regulator, ultra low quiescent current for retention mode
qLR-Aubrey-ref-[1.62-3.63]-[0.55-2.5]-I1-Iq150.02, as any Power Management Virtual Component designed by Dolphin Design, is readi…
Comparator with low-quiescent Hysteresis
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Comparator with low-quiescent Hysteresis
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Linear Regulator, Low Noise optimized for sensitive application such as RF or PLL blocks
nLR-Charny-ref-[1.62-3.63]-[0.8-2.5]-Ixx.02, as any Power Management Virtual Component designed by Dolphin Design, is readily ret…
Linear Regulator for analog island
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Linear Regulator, low quiescent current
The LRA-2.97-3.63-1.8 is a low noise linear regulator.
Linear Regulator, low quiescent current
The LRA-2.97-3.63-1.8 is a low noise linear regulator.
Switching regulator, inductor-based, in dual mode (PFM and PWM) & high efficiency
eSR-Niagara-Bu-dm-ref-[1.62-3.63]-[0.8-2.5].01, as any Power Management Virtual Component designed by Dolphin Design, is readily …
Switching regulator to supply digital islet
eSR-Bu-1.62-3.63-0.8-3.3, like any Power Management Virtual Component designed by Dolphin Design, is readily retargetable toward …
DVB-RCS2 16 State High Speed Turbo Decoder
This is a high speed DVB-RCS2 16 state duobinary turbo decoder with four parallel MAP decoders.
Inmarsat Compatible 16 State Turbo Encoder
This is a high speed 16 state Inmarsat compatible parallel concatenated turbo encoder.
Digital Down Converter with configurable Decimation Filter
The DDC_DEC IP Core is a complex-valued digital down converter with a configurable number of decimation stages.
The BPSK_DEMOD IP Core is a 16-bit resolution Binary-PSK demodulator based on a multiply-filter-divide architecture.
BFSK_DEMOD is a precision Binary-FSK Demodulator IP Core based on a non-coherent receiver design.
NRF5800 is an integrated RF CMOS dual band 802.11a/b/g/n/ac transceiver.
UHD Image Signal Processing (ISP) Pipeline
The logiISP-UHD Image Signal Processing Pipeline IP core is an Ultra High Definition (UHD) ISP pipeline designed for digital proc…
Fully compliant with the VSF (Video Services Forum) Technical Recommendation, "Transport of JPEG 2000 Broadcast profile video in …
Multi-Channel Flex DMA IP Core for PCI Express
The Multi-Channel DMA IP Core for PCI-Express is a PCIe Endpoint with multiple industry standard AXI Interfaces.
The IPrium-DVB-CID-Demodulator IP Core is high performance, wide bandwidth digital solution for detection and identification of s…