GF L018IB 180nm DDR DLL - 88MHz-440MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- GlobalFoundries
- 180nm
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
GF L018IB 180nm DDR DLL - 88MHz-440MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
GF L018CB 180nm DDR DLL - 88MHz-440MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
GF L013N 130nm DDR DLL - 107MHz-535MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
GF L013LV 130nm DDR DLL - 152MHz-760MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
GF L013LP 130nm DDR DLL - 82MHz-410MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
GF L013HP 130nm DDR DLL - 189MHz-945MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
ADC 10-bit pipeline 110Mhz 3.3V
This Analog -to-Digital converter IP has a monolithic differential pipelined architecture with output error correction logic prov…
LVDS Receiver 1250Mb/s, 800Mhz clock
V-Trans 's LVDS technology solutions eliminate the trade-offs in speed, low power, low noise (EMI), and BOM cost saving for high …
LVDS Transmitter 1250Mb/s, 800Mhz clock with RSDS support
V-Trans 's LVDS technology solutions eliminate the trade-offs in speed, low power, low noise (EMI), and BOM cost saving for high …
General-Purpose I/O (GPIO) - 1.5V-1.8V
The 1.8V General Purpose I/O libraries provide bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core p…
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers ope…
"Beyond DCI" 2K JPEG 2000 Encoder/JPEG 2000 Decoder
D-Cinema and the Beyond Cinema JPEG 2000 families have been especially designed to meet today’s requirement of the Digital Cinema…
4K Mathematically Lossless JPEG 2000 Encoder/JPEG 2000 decoder
Keeping image quality intact has always been the priority in the Archiving and Storage, but also in Post-Production, Contribution…
"Beyond DCI" 4K JPEG 2000 Encoder/JPEG 2000 Decoder
D-Cinema and the Beyond Cinema JPEG 2000 families have been especially designed to meet today’s requirement of the Digital Cinema…
The JPEG 2000 Broadcast family has been designed to respond to the various applications of the Broadcast markets.
HD / 2K Mathematically Lossless JPEG 2000 Encoder/JPEG 2000 decoder
Keeping image quality intact has always been the priority in the Archiving and Storage, but also in Post-Production, Contribution…
The D6802 is a 8-bit MPU IP Core.
The MVD DVB-S core is a drop-in module that includes the following functions: - Input data framer from DVB-SPI source (MPEG-TS fl…
The DUSB2 is hardware implementation of full/high-speed peripheral controller that interfaces to the UTMI bus transceiver.
The D68HC11E is synthesisable SOFT Microcontroller IP Core, fully compatible with the Motorola 68HC11E industry standard.