IEEE 802.3cg® 10BASE-T1S Digital Controller
The CT25205 Digital IP core provides the PMA, PCS, and PLCA Reconciliation Sublayer building blocks of a standard IEEE 802.3cg® 1…
- Ethernet
- Silicon-proven
- Available
- IEEE 802.3cg
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
IEEE 802.3cg® 10BASE-T1S Digital Controller
The CT25205 Digital IP core provides the PMA, PCS, and PLCA Reconciliation Sublayer building blocks of a standard IEEE 802.3cg® 1…
USB BCK Technology in TSMC (22nm, 40nm, 55nm, 65nm, 110nm)
In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK(Built-in Cl…
USB 1.1 PHY in TSMC(40nm, 55nm, 90nm ULP process )
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
The VPC-6 is a linear frame rate converter used to convert between frame rates while maintaining the appearance of smooth motion.
AHB DES and Triple DES with DMA
The AHB DES/TDES Encryption/Decryption Engine is a configurable core that interfaces to an AHB microprocessor bus.
RISC-V Compliant Platform Level Interrupt Controller
Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a use…
ASIC IP-core for very-high-throughput decoding (>20G) of 3GPP 5G Release 15
Very high throughput (>20 Gbps) LDPC decoder and encoder for 3GPP 5G Release 15.
Extremely Low Latency Matching Engine Synthesizable IP Core
Axonerve is a next generation variant of the content-addressable memory (CAM) solution.
The Integre GPS Tracking Core.
Camera Link Frame Grabber Channel Link Data Processor
The Integre IP-CamLink is an end to end frame grabber solution for Camera Link processing of image data and image enables that ar…
PowerVR Series9XM Graphic Processor
The PowerVR Series9XM family features include: an scalable compute cluster architecture; high efficiency compression technology i…
PowerVR Series9XE Graphic Processor
The PowerVR Series9XE family features include: an scalable compute cluster architecture; high efficiency compression technology i…
AMBA AHB 4 Channel DMA Controller
The AHB 4 Channel DMA Controller is a multiple-channel direct memory access controller.
AHB Single Channel DMA Controller
The DMA is a configurable single channel direct memory access controller.
AHB Quad SPI Controller with Execute in Place (XIP)
The Quad Serial Peripheral Interface module either controls a serial data link as a master component, or reacts to a serial data …
The SPI to AHB Lite Bridge IP core is commonly used as a monitor interface to allow external devices to access the internal AHB b…
APB Channel with Decoder and Data Mux
The APB Channel provides the necessary infrastructure to connect as many as 16 AHB Slaves (numbered 0-15) to an APB Bus Master.
AHB Channel with Decoder and Data Mux IP Core
The AHB Channel provides the necessary infrastructure to connect as many as 7 AHB Slaves (numbered 1-7) to an AHB bus Master.
The AHB Fabric provides the necessary infrastructure to connect up to 16 shared AHB Slaves to up to 16 AHB-Lite Bus Masters.
AXI External Memory Controller
The AXI External Bus Interface (EBI) allows the processor to transmit and receive data to an external device, usually a memory (S…