Vendor: TES Electronic Solutions Category: Comparator

Voltage Latched Comparator - X-FAB XT018

A high-speed voltage clocked comparator with rail- to-rail outputs and no hysteresis.

X-FAB 180nm XT018 Available on request View all specifications

Overview

A high-speed voltage clocked comparator with rail- to-rail outputs and no hysteresis. The typical propagation delay is 19ns while applying a differential input signal of 1mV over the offset voltage. The comparator operates with a supply voltage of 3.3V typical (VCC). The valid input voltage range is between 0.6V up to VCC. The comparator achieves an input offset voltage of ±1.04mV (3-sigma value). The circuit features an Enable signal turning on/off the comparator.

The comparator uses positive feedback (latch) to increase the comparison speed; thus, its operation consists of a reset phase and a regeneration (comparison) phase, which are controlled by the input clock (CLK). When CLK is ‘High’, the comparator is in the reset phase, and when it is ‘Low’, the comparator compares the voltages at INM and INP inputs and produces a 0 or VCC-level digital output voltage at the outputs DOUT and DOUTB. The CLK frequency is 2MHz. An output latch ensures that DOUT and DOUTB retain their previous values during reset phase.

The comparator features zero static current and low kickback noise. It requires a bias current of 89uA supplied from an external biasing circuit via the TAILBIAS input.

Technology: X-FAB XT018-0.18µm BCD-on-SOI CMOS

OPERATING CONDITIONS

Parameters Min. Typ. Max. Unit
Junction temperature range -40 27 150 ºC
Supply voltage on VCC with respect to ground GNDS 3.2 3.3 3.4 V

Table 1: Latched Comparator Operating Conditions

SPECIFICATION

Parameters Condition Min. Typ. Max. Unit
propagation delay (low to high / high to low) EN = H, Vin_diff = 1mV, CL=100fF, Vin_cm = 1.25V 14.4 19.0 25.4 ns
Input offset voltage (VOS) (3-sigma) EN = H -1.04   1.04 mV
Comparator Area       0.0043 mm²

Table 2: Latched Comparator Specification

Block Diagram

Silicon Options

Foundry Node Process Maturity
X-FAB 180nm XT018 Available on request

Specifications

Identity

Part Number
TS_CMP_19ns_X8
Vendor
TES Electronic Solutions
Type
Silicon IP

Files

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Provider

Learn more about Comparator IP core

A scalable, shader-programmable vector graphics GPU core for low-power MCUs

To meet the growing graphics demands, the industry is shifting toward scalable, shader programmable architectures. Unlike fixed-function graphics accelerators, shader programmable GPUs offer the flexibility required to target diverse market segments and at the same time ensure software portability and maintainability. Furthermore, adopting platform-independent stacks based on industry standards allows accelerating time-to market by developing applications on standard PC platforms before deployment to target hardware. TES Electronic Solutions in Germany addresses these challenges with the D/AVE NX GPU core. Engineered specifically for resource-constrained environments, it supports OpenGL ES 2.0 shader programmability with selected 3.x and vector graphics extensions.

TES offers new voltage buffer IPs

TES Electronic Solutions GmbH offers two new voltage buffer IPs with driving capabilities up to 6 mA, built on X-FAB’s XT018-0.18µm BCD-on-SOI process and operate across a junction temperature range of -40°C to 150°C with a supply voltage of 3.2V to 3.4V.

Frequently asked questions about Comparator IP cores

What is Voltage Latched Comparator - X-FAB XT018?

Voltage Latched Comparator - X-FAB XT018 is a Comparator IP core from TES Electronic Solutions listed on Semi IP Hub. It is listed with support for x-fab Available on request.

How should engineers evaluate this Comparator?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Comparator IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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