VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is a leading public company that provides custom silicon solutions, leveraging its comprehensive and proprietary portfolio of semiconductor IPs.
VeriSilicon possesses six categories of in-house processing IPs, namely Graphics Processing Unit (GPU) IP, Neural Network Processing Unit (NPU) IP, Video Processing Unit (VPU) IP, Digital Signal Processing (DSP) IP, Image Signal Processing (ISP) IP, and Display Processing IP, as well as more than 1,700 analog and mixed-signal IPs, RF IPs, and interface IPs.
Leveraging its own IPs, VeriSilicon has developed a wealth of software and hardware custom chip design platforms targeting Artificial Intelligence (AI) applications, covering always-on ultralight spatial computing devices such as smartwatches and AI/AR glasses, high-efficiency edge computing devices such as AI PCs, AI phones, smart cars, and robots, as well as high-performance cloud computing devices like data centers and servers.
In response to the trend of System-on-Chip (SoC) evolving towards System-in-Package (SiP) driven by the demand for large computing power, VeriSilicon put forward the concepts of "IP as a Chiplet”, "Chiplet as a Platform", and "Platform as an Ecosystem”. The company keeps advancing the R&D and industrialization of its Chiplet technologies and projects from the perspective of interface IP, Chiplet architecture, advanced packaging technology, and others for AI-Generated Content (AIGC) and autonomous driving solutions.
Under its unique “Silicon Platform as a Service” (SiPaaS) business model, VeriSilicon serves a broad range of market segments, including consumer electronics, automotive electronics, computer and peripheral, industrial, data processing, Internet of Things (IoT), among others. Its main customers include fabless, IDM, system vendors (OEM/ODM), large internet companies, and cloud service providers.
Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 9 design and R&D centers, along with 11 sales and customer service offices worldwide. VeriSilicon currently has more than 2,000 employees.
GLOBALFOUNDRIES 22nm FDSOI 1.8v/0.8v Power Regulator
The Power Regulator is to provide 0.8v power supplies which are regulated from the single 1.8v input supply.
This IP is a programmable Analog PLL suitable for high speed clock generation.
GLOBALFOUNDRIES 28nm SLP 2.5v/1.0v PLL
This IP is a programmable Analog PLL suitable for high speed clock generation.
Samsung 28nm FDSOI 1.8v/1.0v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation.
GLOBALFOUNDRIES 28nm SLP 1.8v/1.0v PLL
This IP is a programmable Analog PLL suitable for high speed clock generation.
GLOBALFOUNDRIES 22nm FDSOI 1.8v/0.8v PLL
This IP is a programmable Analog PLL suitable for high speed clock generation.
GLOBALFOUNDRIES 22nm FDSOI 3.3v RTC with 32768Hz Crystal Oscillator
This RTC IP is specifically designed for low power applications, including a 32768Hz crystal oscillator with embedded analog IOs,…
GF 28nm RTC with 32KHz Crystal Oscillator
This 32768Hz crystal oscillator IP with embedded analog IOs has an embedded low power LDO and it is specifically designed for low…
GF 28nm 32KHz Crystal Oscillator
"This is a 32768Hz crystal oscillator specifically designed for ultra-low power application.
GLOBALFOUNDRIES 28nm SLP Multiple Power Supply IO library
Multiple power supply IO library for GF28nm low power 1.0v/2.5v process
SMIC 55nm LP Multiple Power Supply IO library
Multiple power supply IO library for SMIC55nm low power 1.2v/2.5v process
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1”, which consists of Bi-directional 1-Clock and 4-Data lanes.
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes.
The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors.
The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors.
GLOBALFOUNDRIES 28nm SLP sub-LVDS Receiver
The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors.
GLOBALFOUNDRIES 65nm LVDS Transmitter
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…
GLOBALFOUNDRIES 28nm CMOS 1-Channel 10-Bit 350Msps+ Current-Steering D/A Converter
This IP specifies a 3-channel 10-bit resolution, high performance, low power CMOS Digital-to-Analog Converter (DAC) which offers …
The GF28SLPV18_CODEC_04 integrates: 2-channel 24-bit sigma-delta ADC, 2-channel 24-bit sigma-delta DAC with headphone driver ampl…
S55LLRFV25_BLE_02_T is a 2.4GHz ISM band RF Transceiver IP which is designed for Bluetooth Smart applications.