VeriSilicon Introduces GLTiny™ 3D GPU Programming Model for Ultra-Low-Power, Memory-Efficient Wearable Devices
Optimized GLTiny Model Brings Rich 3D Graphics to Resource-Constrained Wearable Devices Powered by OpenGL ES GPUs
Vendor:
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Category:
Single-Protocol PHY
GLOBALFOUNDRIES 65nm LVDS Transmitter
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…
Overview
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link transmission between Host and Flat Panel Display with up to UXGA resolution. The IP converts 70-bit of CMOS/TTL data into LVDS data stream. The transmitter can be programmed for rising edge or falling edge clocks via a dedicated pin.
Key features
- Supports 92MHz clock
- 28:4 data channel compression at data rate up to 650Mbps per channel
- Supports single pixel and dual pixel interfaces
- Converts 56 bits data to 8-pair LVDS data stream
- Clock edge selectable
- Compatible with TIA/EIA-644-A LVDS standard
- Power down mode
- Full industrial operating temperature range -40 ~ +85 °C
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 65nm | G | Silicon Proven |
Specifications
Identity
Part Number
GF65GV25_LVDSTX_05
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Provider
Learn more about Single-Protocol PHY IP core
VeriSilicon Introduces CPP2000 Camera Post-Processing IP for Embodied Robotics and Mobile Vision Applications
VeriSilicon today announced its high-performance CPP2000 Camera Post-Processing (CPP) IP, expanding the company’s Image Signal Processing (ISP) solutions with advanced post-processing capabilities.
VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
VeriSilicon today announced that its VC9800D Video Processing Unit (VPU) IP supports AV2 decoding, further expanding the company’s advanced video codec portfolio for next-generation video and streaming applications.
Hexagon Semi’s HX77 AR Display Processor Achieves Ultra-Low Power Consumption with VeriSilicon’s Nano IP Portfolio
VeriSilicon’s Mature GPU, Display Processing, and DeWarp IPs Collaboratively Enable Highly Integrated, Low-Latency AR Display Processing
VeriSilicon Enhanced ISP8200-FS Series IP Achieves ASIL B Functional Safety Certification
These enhanced IPs have successfully achieved ISO 26262 ASIL B functional safety certifications issued by TÜV NORD, an international inspection and certification institution, further validating their suitability and reliability for ADAS and autonomous driving applications.
VeriSilicon’s NPU IP VIP9000NanoOi-FS has achieved ISO 26262 ASIL B certification
This IP features an architecture streamlined for seamless SoC integration, delivering high-quality inference with low power consumption and a compact silicon footprint. The certificate was issued by SGS-TÜV Saar, an international testing, inspection and certification institution.
Frequently asked questions about Single-Protocol PHY IP
What is GLOBALFOUNDRIES 65nm LVDS Transmitter?
GLOBALFOUNDRIES 65nm LVDS Transmitter is a Single-Protocol PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for globalfoundries Silicon Proven.
How should engineers evaluate this Single-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.