IP Accelerated (Bye Bye EDA 360)
Eric Esteve
Vendor:
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Category:
MIPI PHY
SMIC 110nm MIPI DPHY
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes.
Overview
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both Master and Slave side. Each lane supports 2.5Gbps in High-Speed mode and 10Mbps/lane in Low-Power escape mode. The target applications are CSI-2 and DSI physical layers.
Key features
- Process:SMIC 110nm Process
- SMIC 110nm 1.2V/3.3V
- Compliant with the MIPI D-PHY spec v1.2
- Data rate per lane: High-Speed mode 80M~1.5Gbps, Low-Power mode 10Mbps
- Lane number: 1 clock + 4 data
- On-chip differential 100? terminations with calibration
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| SMIC | 110nm | G | Pre-Silicon |
Specifications
Identity
Part Number
S11V33_DPHY_01
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Standards & Interfaces
MIPI PHY
MIPI D-PHY
Provider
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Frequently asked questions about MIPI PHY IP
What is SMIC 110nm MIPI DPHY?
SMIC 110nm MIPI DPHY is a MIPI PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic Pre-Silicon.
How should engineers evaluate this MIPI PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.