Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Single-Protocol PHY

GLOBALFOUNDRIES 28nm SLP sub-LVDS Receiver

The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors.

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GlobalFoundries 28nm SLP Silicon Proven View all specifications

Overview

The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only.

Key features

  • Supports Aptina HiSPi, Panasonic LVDS, or Sony LVDS parallel input signal
  • 4 data channels / 1 clock channel integrated
  • Maximum serial data rate per channel: 1Gbps
  • Supports up to 8-bit CMOS parallel input (DVP input mode)
  • Each channel configurable independently
  • Controllable 100? on-chip termination resistor
  • De-serializes the serial inputs with a fixed ratio (8)

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 28nm SLP Silicon Proven

Specifications

Identity

Part Number
GF28SLPV18_SUBLVDSRX_01
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Contact VeriSilicon Microelectronics (Shanghai) Co., Ltd.

Learn more about Single-Protocol PHY IP core

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Can MIPI and MDDI Co-Exist?

Since MIPI and MDDI standards both target interfaces to cameras and displays on mobile devices, are two separate standards really needed?

Frequently asked questions about Single-Protocol PHY IP

What is GLOBALFOUNDRIES 28nm SLP sub-LVDS Receiver?

GLOBALFOUNDRIES 28nm SLP sub-LVDS Receiver is a Single-Protocol PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for globalfoundries Silicon Proven.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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