Secure Hash Algorithm 384 IP Core
Bridge to APB, AHB, and AXI bus SHA2-384 is a universal solution that effectively speeds up the SHA2-384 hash function that compl…
- SHA2 (SHA-384)
T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets.
T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules.
With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.
Secure Hash Algorithm 384 IP Core
Bridge to APB, AHB, and AXI bus SHA2-384 is a universal solution that effectively speeds up the SHA2-384 hash function that compl…
Advanced Encryption Standard compliant with FIPS 197
AES bridge, a cryptographic coprocessor that complies with FIPS 197 Encryption Standard, employs the Rijndael encryption method t…
Elliptic Curve Cryptography IP
Our ECC IP Core is a solution that gives your systems access to the capabilities of elliptic curve encryption.
eDisplayPort v1.4 Transmitter Controller IP Core
This eDisplayPort 1.4 Tx Controller IP Core integrates into any SoC or FPGA development, supporting the eDisplayPort 1.4b specifi…
eDisplayPort v1.4 Receiver Controller IP Core
This eDisplayPort 1.4 Rx Controller IP Core is a versatile and comprehensive solution designed for easy integration into any SoC …
GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in SAM 14LPP
The GPHY is a fully integrated IP Core with low power consumption for Giga 10/100/1000 Ethernet applications.
Process voltage and temperature detection of the silicon chip die is accomplished by PVT Sensor, an IP.
DDR3 SDRAM Controller IP with advance feautures package
DDR3 interface provides full support for the DDR3 interface, compatible with JESD79-3F specification and DFI-version 2.0 or highe…
DDR2 interface provides full support for the DDR2 interface, compatible with JESD79-2F specification and DFI-version 2.0 or highe…
DDR Memory Controller IP for low power and high reliability
DDR interface provides full support for the DDR interface, compatible with JESD79F specification and DFI-version 2.0 or higher Sp…
USB 2.0 PHY IP, Silicon Proven in TSMC 16FFC
The entire physical layer (PHY) IP solution for USB 2.0 was created to provide exceptional performance and consume little power.
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 55 ULP
The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specific…
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 40 LP
The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-…
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 40 LP
Many production nodes use the C-PHY/D-PHY Combo because it uses the fewest resources and energy.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 40 LP
C-PHY/D-PHY Combo in various production nodes at low cost and power.
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 28 HPC+
Several production nodes employ C-PHY/D-PHY Combo to consume the least amount of energy and funds.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 28 HPC+
C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes.
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 22 ULP
In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 22 ULP
C-PHY/D-PHY Combo in numerous process nodes at low cost and power.
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 16 FFC
In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo.