Vendor: T2M GmbH Category: MIPI PHY

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 40 LP

C-PHY/D-PHY Combo in various production nodes at low cost and power.

MIPI D-PHY TSMC 40nm LP In Production View all specifications

Overview

C-PHY/D-PHY Combo in various production nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-PHY or C-PHY mode. It complies with the PPI interface as well, making connection with the CIS-2 or DSI controller simple. In a variety of foundry processes, D-PHY and C/D-PHY Combo have the most competitive PPA (Performance, Power, and Area) and standard compliances. The MIPI D-PHY has a ton of functions and is already ISO 26262 ASIL-B certified for multimedia applications in automobiles.

Key features

  • Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0
  • Support both MIPI DSI and CSI-2 protocols
  • Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)
  • Support LS data rate of 10Mbps and Ultra-low power mode
  • Support fast lane turnaround (FTA) and alternate low-power (ALP) mode
  • Support D-PHY mode with 1 clock lane & up to 4 data lanes
  • Support C-PHY mode up to 3 trios for TX and 4 trios for RX
  • Support TX-EQ and Rx-EQ function to compensate loss of a long channel
  • Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)
  • Support additional C-PHY RX mode with 2 sets of 2 trios
  • Provide D-PHY clock and data lane swap function
  • Provide C-PHY trios swap function
  • Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests
  • Silicon proven in TSMC 40LP.

Block Diagram

MIPI C/D-PHY Combo Tx IP in 40LP block diagram

What’s Included?

  • GDSII & layer map
  • Place-Route views (.LEF)
  • Liberty library (.lib)
  • Verilog behaviour model
  • Netlist & SDF timing
  • Layout guidelines, application notes
  • LVS/DRC verification reports

Silicon Options

Foundry Node Process Maturity
TSMC 40nm LP In Production

Specifications

Identity

Part Number
MIPI C/D-PHY Combo Tx IP in 40LP
Vendor
T2M GmbH
Type
Silicon IP

Standards & Interfaces

MIPI PHY
MIPI D-PHY

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

T2M GmbH
HQ: Germany

Learn more about MIPI PHY IP core

Three Design Aspects you shouldn't miss while building an NB-IoT Protocol Stack

It is very important that the design aspects of the NB-IoT device protocol stack ensure low module cost and low energy consumption. This is required to match the industry expected module costs. This paper outlines some of the NB-IoT Protocol stack specification flexibilities and generic design aspects that are to be considered to meet the above requirements, especially with reference to LTE.

Frequently asked questions about MIPI PHY IP

What is MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 40 LP?

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 40 LP is a MIPI PHY IP core from T2M GmbH listed on Semi IP Hub. It is listed with support for tsmc In Production.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP