SHA1, SHA2 Cryptographic Hash Cores
The SHA cores provide implementation of cryptographic hashes SHA-1 (core SHA1), SHA-2 (cores SHA2-256 and SHA2-512).
- SHA1 + 1
IP Cores, Inc specializes on IP cores for semiconductors, primarily in the security and cryptography area with a sprinkle of DSP. Whether your needs are in 802.16e, P1619, 802.1AE, content protection, or FFT, our cryptographic and DSP cores usually are the smallest, fastest, and lowest-cost choices on the market.
SHA1, SHA2 Cryptographic Hash Cores
The SHA cores provide implementation of cryptographic hashes SHA-1 (core SHA1), SHA-2 (cores SHA2-256 and SHA2-512).
HDCP Suite consists of hardware and software components implementing the HDCP 2.0 protocol.
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from …
SSL/TLS Processor IP Core with an AXI Bus Interface
The SSL1 core implements SSL and/or TLS frameworks with a configurable variety of cipher suites.
True Random and Pseudorandom Number Generator
The true random generator core implements true random number generation.
The RC4 core implements the RC4 stream cipher in compliance with the ARC4 specification.
High-Performance Lossless Compression/Encryption Combo Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from …
The FFT1024 core implements 1024 or 512 point FFT in hardware.
The FFT0064 core implements 64 point FFT in hardware.
AKW1 implements the NIST standard AES key wrap and unwrap.
Ultra-Compact Data Encryption Standard (DES/3DES) Core
The DES1 ASIC/FPGA core is an implementation of the DES and triple DES encryption and decryption in compliance with the NIST Data…
AES-GCM MACsec (IEEE 802.1AE) and FC-SP Cores
Implementation of the new LAN security standard 802.1ae (MACSec) requires the NIST standard AES cipher in the GCM mode for encryp…
Parameterizable compact BCH codec
The core targets the lower-performance error correction applications using Bose–Chaudhuri–Hocquenghem codes (BCH codes) that prio…
Core implements the IPsec and SSL/TLS security standard at high data rates that require the cryptographic processing acceleration.
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from …
32/64/128/256/512/1024/2048/4096 Point FFT Core
The FFT4096 core the FFT and IFFT computations for N input samples, where N can be any power of 2 between 32 and 4096 (32, 64, 12…
LRW3 implements the NIST standard AES cipher in the LRW mode for encryption and decryption.