Vendor: Agnisys, Inc. Category: Bus Fabric

Bus Convertors

The bus converter module transforms 64-bit wide initiator data buses to smaller 32-bit target data buses or vice-versa.

Overview

The bus converter module transforms 64-bit wide initiator data buses to smaller 32-bit target data buses or vice-versa. The downsizer module cuts the width of the data channel in half as it transitions from initiator to slave. You can do full-width initiator transfers. This method comprises changing the transfer type, burst, and size, as well as latching half of the initiator read data. Furthermore, several target write or read operations may be necessary to transport data to and from the narrow target. Other width converters are also available for a variety of buses.

Key features

  • AXI
    • Types
      • A narrow target on a wide bus
        • A target module developed for a 32-bit bus can be converted to a 64-bit bus. This technique can be applied to hard macrocells as it only requires external logic and no internal design changes.
          • 32-bit wide initiator data buses to larger 64-bit target data buses
          • 64-bit wide initiator data buses to larger 128-bit target data buses
        • A wide target on a narrow bus
          • Target modules built for 64-bit data buses can be changed to 32-bit buses. This technique can be applied to hard macrocells as it only requires external logic and no internal design change
            • 64-bit wide initiator data buses to smaller 32-bit target data buses
            • 128-bit wide initiator data buses to smaller 32-bit target data buses
          • AHB
            • Types
              • A narrow target on a wide bus
                • A target module developed for a 32-bit bus can be converted to a 64-bit bus. This technique can be applied to hard macrocells as it only requires external logic and no internal design changes.
                  • 32-bit wide initiator data buses to larger 64-bit target data buses
                  • 64-bit wide initiator data buses to larger 128-bit target data buses
                • A wide target on a narrow bus
                  • Target modules built for 64-bit data buses can be changed to 32-bit buses. This technique can be applied to hard macrocells as it only requires external logic and no internal design change
                    • 64-bit wide initiator data buses to smaller 32-bit target data buses
                    • 128-bit wide initiator data buses to smaller 32-bit target data buses
                  • APB
                    • Types
                      • A narrow target on a wide bus
                        • A target module developed for a 16-bit bus can be converted to a 32-bit bus. This technique can be applied to hard macrocells as it only requires external logic and no internal design changes.
                          • 16-bit wide initiator data buses to larger 32-bit target data buses
                          • 8-bit wide initiator data buses to larger 32-bit target data buses
                        • A wide target on a narrow bus
                          • Target modules built for 32-bit data buses can be changed to 16-bit buses. This technique can be applied to hard macrocells as it only requires external logic and no internal design change
                            • 32-bit wide initiator data buses to smaller 16-bit target data buses
                            • 32-bit wide initiator data buses to smaller 8-bit target data buses

Specifications

Identity

Part Number
Bus Convertors
Vendor
Agnisys, Inc.
Type
Silicon IP

Provider

Learn more about Bus Fabric IP core

Automated, Faster Specification to Sign-Off with IDS-AI

IDS-AI is the industry’s first agentic AI framework built specifically for semiconductor development. It understands your design functional specification, your control and status registers (CSRs), your programming sequences, your system-on-chip (SoC) hierarchy, and your block interconnections.

Accelerating SoC Development with Agnisys Silicon IP Portfolio Automation

Modern System-on-Chip (SoC) designs are becoming increasingly complex as they integrate multiple processors, accelerators, memory subsystems, and peripherals. Ensuring efficient communication between these components requires a robust set of interface IPs, interconnects, and protocol bridges. However, designing and integrating these components manually can significantly increase development time,  integration challenges, late‑stage bugs, and pressure on already‑stretched engineering teams.

Frequently asked questions about On-Chip Bus IP cores

What is Bus Convertors?

Bus Convertors is a Bus Fabric IP core from Agnisys, Inc. listed on Semi IP Hub.

How should engineers evaluate this Bus Fabric?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Bus Fabric IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP