Overview
This is a Power-On-Reset circuit that generates a reset pulse when power supply is on. After the power V18 reaches a specific level, i.e., VTR, it will output a logic reset signal with pulse width of tPOR. During this interval, all the logic elements can be initialized to known states. When the power drops to another level VTF, a reset pulse is also generated. The additional input RSTI can force the POR to output a reset signal, therefore, provide a soft reset function.
Learn more about Power On Reset (POR) IP core
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